The present invention relates to a deserializer, and more particularly, to a deserializer capable of converting serial data into parallel data having different data rate.
A conventional 1-to-N deserializer is designed within a receiver and is used for converting high speed serial data into lower speed parallel data with N channels, and the factor “N” of the conventional 1-to-N deserializer is generally fixed. In other words, when the 1-to-N deserializer is designed and manufactured, the ratio between the data rate of the serial data and the data rate of the parallel data cannot be changed. For example, when serial data with 5 Gb/s is inputted into a 1-to-10 deserializer, the deserializer can only output ten parallel data with 500 Mb/s. Therefore, when the receiver needs to convert serial data with different data rate into parallel data with the same data rate, for example converting serial data with 5 Gb/s and 2.5 Gb/s into parallel data with 500 Mb/s, the receiver may include more deserializers to perform these converting operations. The manufacturing cost is therefore increased.